Prof. Xue obtained his bachelor degree in mechanical engineering from Harbin Institute of Technology in 2005 and Ph.D in mechanical engineering from the Hong Kong University of Science and Technology in 2010. After then, Dr. Xue has worked in industry for a long time and built-up extensive experience in designing and developing semiconductor packaging products. Prior to joining Southern University of Science and Technology, he served as Senior Engineer and Chief Engineer of NXP Semiconductors Hong Kong Ltd., and Lead Engineer/Project Leader of Hong Kong Applied Science and Technology Research Institute Ltd., (ASTRI). During his tenure at NXP Semiconductors, he led the design of the company's small signal semiconductor packaging design for reliability and mass production. During his career at ASTRI, he was responsible for the reliability design and optimization of system-in-package (SiP) and high-power electronic devices. His contribution has been widely recognized by industry partners. Dr. Xue has more than ten years of experience in electronic package simulation and reliability optimization. He has led dozens of projects and filed three international invention patents. He is also awarded the Project Management Professional (PMP) certification from the American Project Management Institute (PMI) and the American Society of Quality (ASQ) Certificated Reliability Engineer (CRE) certification.
Reliability design and optimization of semiconductor packaging products
Structural design and heat dissipation analysis of system-level packaging and high power devices
Advanced electronic packaging materials, process and reliability
Macro-microscopic modeling and simulation of mechanical behavior of composite materials
2019.07-now: School of System Design and Intelligent Manufacturing，the Southern University of Science and Technology, Research Assistant Professor
2017.02-2019.06: Hong Kong Applied Science and Technology Research Institute Ltd., Lead Engineer/Project Leader
2011.02-2017.01: NXP Semiconductors Hong Kong Ltd.，Senior Engineer, Chief Engineer
2010.09-2011.01: HKUST，Research Associate
2007-2010 The Hong Kong University of Science and Technology，Department of Mechanical Engineering， Ph.D.
2005-2007 The Hong Kong University of Science and Technology，Department of Mechanical Engineering， M.Sc.
2001-2005 Harbin Institute of Technology，Mechanical Engineering，B.E.
 Weiqiang Li; Ke Xue; Haibin Chen; Kan Lee; Guangxu Cheng; Jingshen Wu.; “Failure Mechanism of Fly Die in Eutectic Bonding”, IEEE Transactions on Components, Packaging and Manufacturing Technology, vol.5, no. 6, pp. 838-844, 2015.
 Weiqiang Li, Haibin Chen, Jiale Han, Ke Xue, Fei Wong, Shiu, I., “Effects of copper plating thickness of Ni/Fe alloy leadframe on the thermal performance of Small Outline Transistor (SOT) packages”, IEEE Transactions on Components, Packaging and Manufacturing Technology, vol.3, no. 10, pp. 1713-1719, 2013.
 Yejun Zhu; Haibin Chen; Ke Xue; Martin Li; Jingshen Wu, “Thermal and reliability analysis of clip bonding package using high thermal conductivity adhesive”, IEEE 15th Electronics Packaging Technology
Conference, pp. 259-263, 2013.
 Ke Xue, Jingshen Wu, Haibin Chen, Jingbo Gai and Lam, A., “Reliability based design optimization for fine pitch ball grid array: Modeling construction and DOE analysis,” 11th Electronics Packaging Technology Conference (EPTC), pp. 812-817, 2009.
 Ke Xue, Jingshen Wu, Haibin Chen, Jingbo Gai and Lam, A., “Warpage prediction of fine pitch BGA by finite element analysis and shadow moiré technique,” 10th International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP), pp. 317-321, 2009.
 Ke Xue, Jingshen Wu, Haibin Chen, Yongqiao Sun, Kwan, K., Yuen, J. and Lam, A., “Numerical analysis of interfacial delamination in thin array plastic package,” 9th International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP), pp. 1-5, 2008.